ICE40HX1K-STICK-EVN

 Flexible Logic Architecture 

 Five devices with 384 to 7,680 LUT4s and 10 to 206 I/Os 

 Ultra-low Power Devices 

 Advanced 40 nm low power process 

 As low as 21 µA standby power 

 Programmable low swing differential I/Os 

 Embedded and Distributed Memory 

 Up to 128 kb sysMEM™ Embedded Block RAM 

 Pre-Engineered Source Synchronous I/O 

 DDR registers in I/O cells 

 High Current LED Drivers 

 Three High Current Drivers used for three different LEDs or one RGB LED 

 High Performance, Flexible I/O Buffer 

 Programmable sysI/O™ buffer supports wide range of interfaces: 

 LVCMOS 3.3/2.5/1.8 

 LVDS25E, subLVDS 

 Schmitt trigger inputs, to 200 mV typical hysteresis 

 Programmable pull-up mode 

 Flexible On-Chip Clocking 

 Eight low skew global signal resources 

 Up to two analog PLLs per device 

 Flexible Device Configuration 

 SRAM is configured through: 

 Standard SPI Interface 

 Internal Nonvolatile Configuration Memory (NVCM) 

 Broad Range of Package Options 

 WLCSP, QFN, VQFP, TQFP, ucBGA, caBGA, and csBGA package options 

 Small footprint package options 

 As small as 1.40 mm x 1.48 mm 

 Advanced halogen-free packaging