XC5VFX200T-1FFG1738I datasheet
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XC5VFX200T-1FFG1738I Xilinx
Xilinx
Xilinx 是 All Programmable FPGA、SoC、MPSoC 和 3D IC 的领先供应商。 AMD 独特地支持软件定义和硬件优化的应用程序——推动云计算、5G 无线、嵌入式视觉和工业物联网的行业进步。
查看所有产品从 XilinxThe Xilinx® Virtex® UltraScale+™ FPGAs are available in -3, -2, -1 speed grades, with -3E devices having the highest performance. The -2LE devices can operate at a VCCINT voltage at 0.85V or 0.72V and provide lower maximum static power. When operated at VCCINT = 0.85V, using -2LE devices, the speed specification for the L devices is the same as the -2I speed grade. When operated at VCCINT = 0.72V, the -2LE performance and static and dynamic power is reduced.
DC and AC characteristics are specified in extended (E), industrial (I), and military (M) temperature ranges. Except the operating temperature range or unless otherwise noted, all the DC and AC electrical parameters are the same for a particular speed grade (that is, the timing characteristics of a -1 speed grade extended device are the same as for a -1 speed grade industrial device). However, only selected speed grades and/or devices are available in each temperature range.
The recommended power-on sequence is VCCINT, VCCINT_IO/VCCBRAM, VCCAUX/VCCAUX_IO, and VCCO to achieve minimum current draw and ensure that the I/Os are 3-stated at power-on. The recommended power-off sequence is the reverse of the power-on sequence. If VCCINT and VCCINT_IO/VCCBRAM have the same recommended voltage levels, they can be powered by the same supply and ramped simultaneously. VCCINT_IO must be connected to VCCBRAM. If VCCAUX/VCCAUX_IO and VCCO have the same recommended voltage levels, they can be powered by the same supply and ramped simultaneously. VCCAUX and VCCAUX_IO must be connected together. VCCADC and VREF can be powered at any time and have no power-up sequencing requirements.
For devices with HBM, the HBM power supplies can be powered on/off after or in-parallel with the core power supplies. The required power-on sequence is VCCAUX_HBM and VCCINT_IO followed by VCC_HBM/VCC_IO_HBM. VCC_IO_HBM must be connected to VCC_HBM. VCCAUX_HBM must be equal to or higher than VCC_HBM at all times.
The recommended power-off sequence is the reverse of the power-on sequence. The recommended power-on sequence to achieve minimum current draw for the GTY or GTM transceivers is VCCINT, VCCINT_GT, VMGTAVCC, VMGTAVTT OR VMGTAVCC, VCCINT, VCCINT_GT, VMGTAVTT. There is no recommended sequencing for VMGTVCCAUX. Both VMGTAVCC and VCCINT can be ramped simultaneously. When VCCINT and VCCINT_GT have the same recommended operating conditions, VCCINT and VCCINT_GT can be connected to the same power regulation circuit. When VCCINT and VCCINT_GT are connected to separate regulation circuits, VCCINT_GT must be within the recommended operating condition before device configuration.The recommended power-off sequence is the reverse of the power-on sequence to achieve minimum current draw. If these recommended sequences are not met, current drawn from VMGTAVTT can be higher than specifications during power-up and power-down.
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类型 | 描述 | 全选 |
---|---|---|
系列 | Virtex®-5 FXT | |
包装 | 托盘 | |
产品状态 | 在售 | |
可编程 | 未验证 | |
LAB/CLB 数 | 15360 | |
逻辑元件/单元数 | 196608 | |
总 RAM 位数 | 16809984 | |
I/O 数 | 960 | |
电压 - 供电 | 0.95V ~ 1.05V | |
安装类型 | 表面贴装型 | |
工作温度 | -40°C ~ 100°C(TJ) | |
封装/外壳 | 1738-BBGA,FCBGA | |
供应商器件封装 | 1738-FCBGA(42.5x42.5) |
Xilinx
Xilinx 是 All Programmable FPGA、SoC、MPSoC 和 3D IC 的领先供应商。 AMD 独特地支持软件定义和硬件优化的应用程序——推动云计算、5G 无线、嵌入式视觉和工业物联网的行业进步。
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