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• Auto-Power-Up Feature Prevents Printer
•Errors When Printer Is Turned On, But NoValid Signal Is at A9–A13 Pins1.4-kW Pullup Resistors Integrated on AllOpen-Drain Outputs Eliminate the Need forDiscrete Resistors
• Designed for IEEE Std 1284-I (Level-1 Type)
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•and IEEE Std 1284-II (Level-2 Type) ElectricalSpecificationsFlow-Through Architecture Optimizes PCBLayoutIoff and Power-Up 3-State Support HotInsertionLatch-Up Performance Exceeds 100 mA PerJESD 78, Class IIESD Protection– – 4 kV – Human-Body Model– – 8 kV – IEC 61000-4-2, Contact Discharge(Connector Pins)– – 15 kV – IEC 61000-4-2, Air-Gap Discharge(Connector Pins)– – 15 kV – Human-Body Model(Connector Pins)
The SN74LVCE161284 is designed for 3-V to 3.6-V VCC operation. This device provides asynchronous two-waycommunication between data buses. The control-function implementation minimizes externaltimingrequirements.This device has eight bidirectional bits; data can flow in the A-to-B direction when the direction-control input (DIR)is high and in the B-to-A direction when DIR is low. This device also has five drivers that drive the cable side andfour receivers. The SN74LVCE161284 has one receiver dedicated to the HOST LOGIC line and a driver to drivethe PERI LOGIC line.ORDERING INFORMATION
The output drive mode is determined by the high-drive (HD) control pin. When HD is high, the outputs are in atotem-pole configuration, and in an open-drain configuration when HD is low. This meets the drive requirementsas specified in the IEEE Std 1284-I (level-1 type) and IEEE Std 1284-II (level-2 type) parallel peripheral-interfacespecifications. Except for HOST LOGIC IN and peripheral logic out (PERI LOGIC OUT), all cable-side pins havea 1.4-kWintegrated pullup resistor. The pullup resistor is switched off if the associated output driver is in the lowstate or if the output voltage is above VCC CABLE. If VCC CABLE is off, PERI LOGIC OUT is set to low.The device has two supply voltages. VCC is designed for 3-V to 3.6-V operation. VCC CABLE supplies the inputsand output buffers of the cable side only and is designed for 3-V to 3.6-V and for 4.7-V to 5.5-V operation. Evenwhen VCC CABLE is 3 V to 3.6 V, the cable-side I/O pins are 5-V tolerant.The Y outputs (Y9–Y13) stay in the high state after power on until an associated input (A9–A13) goes high.When an associated input goes high, all Y outputs are activated, and noninverting signals of the associatedinputs are driven through Y outputs. This special feature prevents printer-system errors caused by deassertingthe BUSY signal in the cable at power on.FUNCTION TABLE
TYPE | DESCRIPTION | Select all |
---|---|---|
Package | Tape & Reel (TR) | |
Series | 74LVCE | |
Supplier Device Package | 48-TSSOP | |
Package / Case | 48-TFSOP (0.240", 6.10mm Width) | |
Mounting Type | Surface Mount | |
Operating Temperature | 0°C ~ 70°C | |
Number of Bits | 19 | |
Supply Voltage | 3V ~ 3.6V | |
Logic Type | IEEE STD 1284 Translation Transceiver | |
Product Status | Active |
Texas Instruments
Texas Instruments Incorporated (TI) is a global semiconductor powerhouse, crafts advanced analog ICs and embedded processors. Fueled by top-tier minds, TI's innovations drive tech's future, impacting 100,000+ clients.
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