XCR3256XL-12TQG144I

XCR3256XL-12TQG144I

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Xilinx
XCR3256XL-12TQG144I
IC CPLD 256MC 10.8NS 144TQFP
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$55.12

Price update:2024-05-23
Available in stock: 500
45
Serves customers in 45 countries
1000+
Worldwide Manufacturers
$140M
$140M Growth in 5 Years
50.0M+
50M Parts Shipped in 5 Years
Xilinx

Xilinx

Xilinx stands as a preeminent purveyor of All Programmable Field-Programmable Gate Arrays (FPGAs), System on Chips (SoCs), Multiprocessor System on Chips (MPSoCs), and Three-Dimensional Integrated Circuits (3D ICs). AMD stands in a distinctive position, facilitating applications that embody a dual nature of software-defined sophistication and hardware-honed optimization. This empowering of industries finds its zenith in the realms of Cloud Computing, 5G Wireless Connectivity, Embedded Vision, and the sprawling domain of Industrial Internet of Things (IIoT).

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XCR3256XL-12TQG144I Products

Introduction 

The Spartan@-ll Field-Programmable Gate Array family gives users high performance, abundant logic resources, and a rich feature set, all at an exceptionally low price. The six-member family offers densities ranging from 15,000 to 200,000 system gates, as shown in Table 1. System performance is supported up to 200 MHz. Features includeblock RAM(to 56K bits), distributed RAM(to 75,264 bits), 16 selectable I/O standards, and four DLLs. Fast, predictable interconnect means that successive design iterations continue to meet timing requirements.

The Spartan-lI family is a superior alternative to mask-programmed ASICs. The FPGA avoids the initial cost, lengthy development cycles, and inherent risk ofconventional ASICs. Also, FPGA programmability permits design upgrades in the field with no hardware replacement necessary(impossible with ASICs).

Features
· Second generation ASIC replacement technology
  -Densities as high as 5,292 logic cells with up to 200,000 system gates
  -Streamlined features based on Virtex? FPGA architecture
  -Unlimited reprogrammability
  -Very low cost
  -Cost-effective 0.18 micron process

· System level features
  -SelectRAM TM hierarchical memory: 16bits/LUT distributed RAM Configurable 4K bit block RAM
· Fast interfaces to external RAM
  -Fully PCI compliant
  -Low-power segmented routing architecture
  -Full readback ability for verification/observability
  -Dedicated carry logic for high-speed arithmetic
  -Efficient multiplier support
  -Cascade chain for wide-input functions
  -Abundant registers/latches with enable, set, reset
  -Four dedicated DLLs for advanced clock control
  -Four primary low-skew global clock distribution nets
  -IEEE 1149.1 compatible boundary scan logic

·Versatile I/O and packaging
  -Pb-free package options
  -Low-cost packages available in all densities
  -Family footprint compatibility in common packages
  -16high-performance interface standards
  -Hot swap Compact PCI friendly
  -Zero hold time simplifies system timing
·Core logic powered at 2.5V and I/Os powered at 1.5V,2.5V,or 3.3V
·Fully supported by powerful XilinxISEdevelopment system
  -Fully automatic mapping,placement,and routing


Feature

  • Low power 3.3V 256 macrocell CPLD
  • 7.0 ns pin-to-pin logic delays
  • System frequencies up to 154 MHz
  • 256 macrocells with 6,000 usable gates
  • Available in small footprint packages
    • 144-pin TQFP (120 user I/O pins)
    • 208-pin PQFP (164 user I/O)
    • 256-ball FBGA (164 user I/O)
    • 280-ball CS BGA (164 user I/O)
  • Optimized for 3.3V systems
    • Ultra low power operation
    • Typical Standby Current of 18 μA at 25° C
    • 5V tolerant I/O pins with 3.3V core supply
    • Advanced 0.35 micron five layer metal EEPROM process
    • Fast Zero Power™ (FZP) CMOS design technology
    • 3.3V PCI electrical specification compatible outputs (no internal clamp diode on any input or I/O)
  • Advanced system features
    • In-system programming
    • Input registers
    • Predictable timing model
    • Up to 23 clocks available per function block
    • Excellent pin retention during design changes
    • Full IEEE Standard 1149.1 boundary-scan (JTAG)
    • Four global clocks
    • Eight product term control terms per function block
  • Fast ISP programming times
  • Port Enable pin for additional I/O
  • 2.7V to 3.6V supply voltage at industrial grade voltage range
  • Programmable slew rate control per output
  • Security bit prevents unauthorized access
  • Refer to the CoolRunner™ XPLA3 family data sheet (DS012) for architecture description

Product Attributes

TYPE DESCRIPTION Select all
Package / Case 144-LQFP
Programmable Not Verified
Supplier Device Package 144-TQFP (20x20)
Programmable Type In System Programmable (min 1K program/erase cycles)
Delay Time tpd(1) Max 10.8 ns
Voltage Supply - Internal 2.7V ~ 3.6V
Number of Logic Elements/Blocks 16
Number of Macrocells 256
Number of Gates 6000
Number of I/O 120
Series CoolRunner XPLA3
Operating Temperature -40°C ~ 85°C (TA)
Package Tray
Mounting Type Surface Mount
Product Status Active

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$55.12

Price update:2024-05-23
Available in stock: 500
Xilinx

Xilinx

Xilinx stands as a preeminent purveyor of All Programmable Field-Programmable Gate Arrays (FPGAs), System on Chips (SoCs), Multiprocessor System on Chips (MPSoCs), and Three-Dimensional Integrated Circuits (3D ICs). AMD stands in a distinctive position, facilitating applications that embody a dual nature of software-defined sophistication and hardware-honed optimization. This empowering of industries finds its zenith in the realms of Cloud Computing, 5G Wireless Connectivity, Embedded Vision, and the sprawling domain of Industrial Internet of Things (IIoT).

View All Product from Xilinx

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